EDN

Move beyond the legacy of IR drop

For years, the popular myth that IR drop accurately reflects power has been ingrained in the minds of chip designers working on design flows. The legacy of static IR drop can be traced to the tendency ...
Semiconductor Engineering

Tame IR Drop Like Google

In the relentless pursuit of semiconductor performance and efficiency, tech giants like Google are constantly pushing the boundaries of what’s possible. As they scale their designs to the cutting-edge ...
EDN

Cadence extends IR drop capability in VoltageStorm

SAN FRANCISCO — Cadence Design Systems Inc. has extended the IR drop analysis capability of its Voltage Storm power analysis tool. The capability, known as PowerMeter, is designed to enable ...
Nasdaq

SEALSQ Corp Partners with ColibriTD and Xdigit to Enhance Semiconductor Yields at Sub-7nm Nodes Through Innovative IR Drop Solutions

SEALSQ, ColibriTD, and Xdigit partner to enhance semiconductor wafer yields below 7nm by addressing IR Drop issues using quantum computing. SEALSQ Corp, in collaboration with ColibriTD and Xdigit, is ...
Business Wire

Cadence Announces Voltus InsightAI, Industry’s First Generative AI Technology that Automatically Identifies and Addresses EM-IR Violations

SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced the new Cadence ® Voltus ™ InsightAI, the industry’s first generative AI technology that automatically ...
Electronic Design

Neglecting IR Drop In Nanometer Designs Leads To Silicon Failure

In the move to higher clock rates and advanced process technologies, designers find increasing silicon failure in designs that appear to pass verification signoff. Today, many problems can be traced ...
Business Wire

Cadence Announces Tempus Power Integrity Solution for Signoff Timing-Aware IR Drop Analysis

SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced the Tempus ™ Power Integrity Solution, the industry’s first comprehensive static timing/signal integrity ...
Semiconductor Engineering

PGIREM: Reliability-Constrained IR Drop Minimization and Electromigration Assessment of VLSI Power Grid Networks using Cooperative Coevolution

“Due to the resistance of metal wires in power grid network, voltage drop noise occurs in the form of IR drop which may change the output logic of underlying circuits and may affect the reliability ...
Design-Reuse

Power analysis in 7nm Technology node

This article discusses the power analysis of a complex 7nm networking chip. As the next-generation System on a Chip (SoC) moves toward the future, the chip size decreases with a simultaneous increase ...
Electronic Design

Minimizing Power-Supply Voltage Drop on PCBs

Despite the widespread availability and use of low-power components, today’s printed circuit boards (PCBs) can require a significant amount of current, with boards drawing 50, 100, and even 200 A in ...
New Electronics

Tame IR drop like Google

In the relentless pursuit of semiconductor performance and efficiency, tech giants like Google are constantly pushing the boundaries of what's possible. Tech giants continue to push the boundaries of ...
Design-Reuse

Cadence Announces Tempus Power Integrity Solution for Signoff Timing-Aware IR Drop Analysis

SAN JOSE, Calif., Nov 6, 2019-- Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced the Tempus ™ Power Integrity Solution, the industry’s first comprehensive static timing/signal integrity ...